High-Speed High-Swing Charge-Steering Latches

Document Type : Original research paper

Authors

1 Department of Electronics and Electrical Communications Engineering, Faculty of Engineering, Ain-Shams University, Cairo, Egypt

2 Department of Electronics and Electrical Communications Engineering, Faculty of Engineering, Ain- Shams University, Cairo, Egypt

Abstract

This paper introduces two novel charge-steering (CS) latches that can achieve a high output swing by accelerating the operation of the tail capacitor. These latches are particularly well-suited for use in hybrid circuits, such as demultiplexers (DEMUXs) and clock and data recovery (CDR) systems, as well as in mixed-mode circuits like analog-to-digital converters (ADCs). The proposed latches address the increasing demand for power-efficient solutions in high-speed transceivers, where balancing performance and energy consumption is critical. Implemented using 40- nm CMOS technology, the latches operate at data rates of 28 Gb/s while consuming only 290 μW and 304 μW from a 1V supply. They achieve differential output swings of 941 mVpp and 1.22 Vpp. This represents a significant improvement in output swing. By incorporating NMOS capacitors in the tail, the latches demonstrate an increase in output swing of up to 50% compared to previous designs, with only a small increase in power consumption. Simulation results confirm the high-speed performance and power efficiency of the design, making it highly suitable for next- generation communication systems.

Keywords

Journal of Engineering Advances and Technologies for Sustainable Applications
Volume 1, Issue 1 - Serial Number 1
Special Issue, Selected papers from The International Conference on Engineering, Technology, and Sciences (ICETS 2025)
January 2025
Pages 42-47

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